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At the moment, there are three main tracks under consideration, exploiting the use of partial dynamic reconfiguration to achieve/evaluate fault detection/tolerance properties:
- exploration of the solution space with respect to the application of traditional fault detection/tolerance techniques [read more ...];
- fault injection and error analysis [read more ...];
- design of fault tolerant checker and voter circuits [read more ...].
Are you looking for more information? Send an email to: info@dresd.org
This work is licensed under a Creative Commons Attribution-Share Alike 2.5 Italy License
This work is licensed under a Creative Commons Attribution-Share Alike 2.5 Italy License
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