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2007
Marco Novati,
2D Relocation for Self Dynamical Run-time Reconfiguration,
, 2007  .
Alessio Montone,
A Harvard-based Processing Element for Partial Dynamic Reconfigurable Architectures,
, 2007  .
Alessandro Meroni,
CITiES - Reconfiguration Oriented Metrics,
, 2007  .
Simone Corbetta,
Communication Infrastructure for Reconfigurable Systems: Concepts and Techniques,
, 2007  .
Ivan Beretta,
Development of an OS Architecture-Independent Layer for Dynamic Reconfiguration,
, 2007  .
Matteo Murgida,
DReAMS - Architecture Definition,
, 2007  .
Antonio Piazzi,
Design Flow: A New Work Metodology Definition - 3rd Phase Report,
, 2007  .
Marco Maggioni,
HLR: High Level Reconfiguration,
, 2007  .
Andrea Maesani, Andrea Maestroni, Emanuele Padula,
Importare un progetto da CoDeveloper in EDK,
, 2007  .
Massimo Morandi,
Management of 2D Reconfiguration in a Dynamically Reconfigurable System,
, 2007  .
Sabrina Cattaneo,
Non maxima suppression,
, 2007  .
Alessandro Panella,
SPartA: a Novel Structural Algorithm for Multi-FPGA Partitioning,
, 2007  .
2006
Fabio Cancarè,
A Custom Bus Macro Generator For FPGA Dynamic Partial Reconfiguration,
, 2006  .
Ivan Beretta, Stefano Bosisio,
Analisi Leon,
, 2006  .
Matteo Murgida, Alessandro Panella,
Automatic Interfacing Oriented Core Implementation (For Slave Peripherals),
, 2006  .
Massimo Morandi, Marco Novati,
BiRF (Bitstream Relocation Filter),
, 2006  .
Paolo Sala,
CALC,
, 2006  .
Michele Santoro,
Diopsis 740: A Dual Processors Architecture,
, 2006  .
Davide Candiloro,
IP-Core Generator for the WishBone Bus,
, 2006  .
Davide Quarta,
Implementazione dell’algoritmo di cifratura Noekeon in VHDL,
, 2006  .
Michele Mancini, Andrea Mariana, Roberto Napoli,
OPB to/from Wishbone Bridge,
, 2006  .
Francesco Redaelli,
Shining: Caronte Methodology Extensions for HW/SW Codesign,
, 2006  .
A. Febretti, A. Frossi,
Template Choice and Template Hierarchy Graph construction during the Partition Phase in reconfigurable environment.,
, 2006  .
Marco Maggioni,
Test dell’algoritmo di codifica AES sul simulatore di Architetture Dinamicamente Riconfigurabili,
, 2006  .
2005
Michele Panzeri, Giordano Tamburelli,
Diopsis 740: A Dual Processors Architecture,
, 2005  .
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