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Abstract:

In many applications, string pattern matching is one of the most intensive task in terms of computation time and memory accesses. Network Intrusion Detection Systems and DNA Sequence Matching are two of those. Since software solutions are not able to satisfy the requirements in terms of performance, specialized hardware architectures are required. In this paper we propose a complete framework for regular expression matching, both in its architecture and compiler. This special-purpose processor is programmed using a regular expression programming language. The parallelism adopted in the design grants the possibility to achieve a throughput greater than one character per clock cycle requiring $O(n)$ memory space. The VHDL description of the proposed architecture is fully configurable. A design space exploration to find the optimal architecture based on area and performance cost-function is presented.