- No upcoming events available
User login
Syndicate
Task Scheduling Tailored for Partially Dynamically Reconfigurable Devices
Mon, 10/01/2007 - 13:59 — Anonymous
Source:
CS, University of Illinois at Chicago, Chicago (2007)Keywords:
hlr; puppeteer; uicFull Text:
Are you looking for more information? Send an email to: info@dresd.org
This work is licensed under a Creative Commons Attribution-Share Alike 2.5 Italy License
This work is licensed under a Creative Commons Attribution-Share Alike 2.5 Italy License
Events
| Mon | Tue | Wed | Thu | Fri | Sat | Sun |
|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | ||
| 6 | 7 | 8 | 9 | 10 | 11 | 12 |
| 13 | 14 | 15 | 16 | 17 | 18 | 19 |
| 20 | 21 | 22 | 23 | 24 | 25 | 26 |
| 27 | 28 | 29 |
Search
New Publications
- Studio e realizzazione di controller VGA per sistemi embedded basati su FPGA
- Sistemi embedded sviluppati tramite EDK: implementazione ed analisi delle prestazioni del meccanismo di DMA sul bus OPB
- FLOORPLACEMENT IN DYNAMIC RECONFIGURABLE FPGA-BASED SYSTEMS
- Riconfigurazione dinamica parziale di FPGA per la correzione di guasti SEU: analisi dello spazio delle soluzioni