Upcoming events

  • No upcoming events available

CITiES

No posts in this group.

NEWS: Instruction and configuration files to replicate the tests done for the TII submission are now available!
Click here to download the archive

CITiES Project Description
Recent advances in VLSI technology show the limits of the classical computation-centric design paradigm. The ever increasing level of integration and complexity in digital electronic systems requires a communication-centric approach for designing high performance systems, where integrable modules (IP-Cores) require high levels of communication. Classical approaches like bus or point-to-point interconnects are no longer sufficient to ensure and support communication requirements. Buses become a bottleneck with the increasing number of integrable modules, while point-to-point interconnects are only feasible for short range applications. A new relevant approach has been defined, namely Network-on-Chip, in which theory and applications of well-known data networks are borrowed in the System-on-Chip context.

In this scenario, there is an emerging need of having a methodology that supports the designer in the definition of the best fitting communication infrastructure. This scenario can be further extended to support partial dynamic reconfiguration of the Communication Infrastructure (CI), in order to cope either with the changes of the user needs or with the changing environment.

The Communication Infrastructure Tailored to Embedded Systems design (CITiES) project aims at defining a complete methodology for the exploration of the solution space of the CIs (point-to-point, bus, Network-on-Chip, with their parameters), in order to support the designer in the choice of the best fitting CI. For this purpose, an approach has been developed that allows the design of a system in a completely independent way from the CI that will be used.

For a general overview of the CITiES project, please download the PPT and/or the PDF CITiES presentation.


Syndicate content