Information: info@dresd.org

.:: Project Description ::.

BiRF provides the architectural support of the flow. The first part is related to the creation of a tool which provides the necessary validation for the chosen reconfigurable model and the reconfigurable infrastructure, fitted into the target architecture. Furthermore, a simulation framework has to be provided to monitor the evolution of the reconfigurable system; this is useful to evaluate the various choices in placement policies and area constraints definitions. This is the heart of the expert system and therefore has a critical role in the workflow.

The last part of the subproject is the generation of a suitable solution to exploit relocation for each specific scenario. Relocation is a powerful technique used to obtain, starting from the bitstream used to completely describe a functionality in a single location, all the possible configuration files for the same functionality in different positions of the FPGA. With this kind of approach it is possible to save up a significant amount of internal memory: in fact, it is possible to store only a single bitstream for each functionality, instead of one for each possible location in the device. For this purpose, two different solutions have already been created, BiRF for 1D, and BiRF Square for 2D; for both these solution several versions have been developed, to meet various necessities.

.:: Involved Institutes ::.

.:: Politecnico di Milano



.:: DRESD documentation about this project ::.

Filters: keyword is birf

  [Clear All Filters]